NeuroMem IP and Chips

Scalable neural network

Available as a software IP or a bank of chips.

Design your solution with provisions to expand as your knowledge will grow.

 

  • Neuron cell = memory + processing logic
  • Homogenous assembly with no supervisor
  • Full interconnect between neuron cells

NeuroMem IP platforms

NeuroMem simulation

  • 1024 neurons
  • Latencies proportional to network capacity
  • C++ source code
  • C++ behavioral test script
  • Compatible ARM/RISC

NeuroMem Top IP

  • 64 neurons
  • Avalon bus
  • Neuron expansion bus
  • Recognition Logic (optional use)
  • Support Xilinx, Intel and Microchip FPGAs

NeuroMem Expansion

  • 256 neurons
  • NeuroMem expansion bus
  • Cascadability depends on FPGA LUTs
  • 1 neuron takes approximately 180 LUTs

NeuroMem chips

 

NM500

  • 576 neurons / chip
  • Parallel bus
  • BGA package
  • Manufactured by Nepes

ANM5500

  • 5500 neurons / chip
  • Built-in recognition logic
  • Parallel and I2C bus
  • TQFP package
  • Manufactured by AlfaPlus Semiconductor
  • Evaluation Kit available