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NeuroMem CM1K chip

The CM1K chip is a first embodiement of the NeuroMem Technology and a pattern recognition accelerator that enables practical usage of neural network and KNN algorithms for applications from smart sensing to data analytics and high performance computing. The CM1K chip features 1024 neurons working in parallel and capable of learning and recognizing patterns in a deterministic latency of a few microseconds. Its two non-linear classifiers (RBF and KNN) can recognize patterns while coping with ill-defined data, unknown events and changes of contexts. CM1K has a very simple patented architecture which is a chain of identical neurons operating in parallel without any controller or supervisor. Each neuron is an associative memory which can autonomously compare an incoming pattern with its reference pattern. During recognition all the neurons communicate briefly with one another to find which one has the best match.

CM1K was awarded the New Product Innovation Award for Cognitive Computing Processors by Frost and Sullivan. Download datasheet.

NeuroMem CM1K ASIC in TQFP package and its dye showing the grid array of 32x32 identical and interconnected neuromorphic memories or 1024 neurons

NeuroMem CM1K ASIC in TQFP package and its dye showing the grid array of 32×32 identical and interconnected neuromorphic memories or 1024 neurons

Specifications

  • All neurons have the same behavior and execute the instructions in parallel
    • This applies whether they belong to a same chip or different daisy-chained chips
  • Implementation of two classifiers selectable through a status register:
    • K-Nearest Neighbor (KNN)
    • Radial Basis Function (RBF)
  • Recognition and learning in a constant amount of time
    • less than 10 microseconds per input pattern
    • regardless of the number of neurons in use
  • Automatic model generator built into the neurons
  • Simple Register Transfer Level instruction set through of 15 registers
  • Knowledge built by the neurons can be Saved and Restored
  • Daisy-chaining of chips to build larger network with 1024 neurons increment